3 ms·
yes, L cache for sure is more delicate than a ram that you clip to the motherboard with 1000x the size - so it's only a cost factor? what is the other reason to
by iammyIP 11y ago
yes, L cache for sure is more delicate than a ram that you clip to the motherboard with 1000x the size - so it's only a cost factor? what is the other reason to not simply increase the cpu die size and put lots of cache next to it?
the ibm high power you mentioned doesnt seem to have large cache sizes, it's just double or triple the usual amount, 8mb L3 chache is not even close to a gigabyte, it's like ram in 1995, and that is a power cpu architecture? My 6 year old cheap amd cpu has 2mb L3.
here is a ibm power spec sheet:
http://www-01.ibm.com/common/ssi/cgi-bin/ssialias?subtype=SP&infotype=PM&appname=STGE_PO_PO_USEN&htmlfid=POD03096USEN&attachment=POD03096USEN.PDF http://www-01.ibm.com/common/ssi/cgi-bin/ssialias?subtype=SP...
- nickpsecurity 11y agoIt's a price-, feature-, and energy-sensitive market. You can't just max one metric without caring about effects. Such things can cost companies. Far as cache sizes, I was referring to this: http://www.theregister.co.uk/2012/10/03/ibm_power7_plus_server_launch/ http://www.theregister.co.uk/2012/10/03/ibm_power7_plus_serv... https://en.wikipedia.org/wiki/POWER8 https://en.wikipedia.org/wiki/POWER8 POWER7+ used embedded DRAM to vastly up the cache size vs other processors. The POWER8 apparently mixes internal and external caches or something. I'm not sure. In any case, it's not the few MB to 8MB that's more common: it starts over 10x higher than that using a much slower tech. Also note that it's a 15 layer chip with each layer costing extra silicon and masks vs 3 or so for memory fabs. Note: A mask set might be a few million dollars with silicon wafers at around $3,000 a piece. So, a 5x reduction in masks/silicon might make a substantial difference in price of prototyping and production. ;)