3 ms·
I've been really wanting to try Chisel https://chisel.eecs.berkeley.edu/ https://chisel.eecs.berkeley.edu/ They have a RISC V implementation in it so it can't
by brian-armstrong 11y ago
I've been really wanting to try Chisel https://chisel.eecs.berkeley.edu/ https://chisel.eecs.berkeley.edu/
They have a RISC V implementation in it so it can't be too bad
- sebastic 11y agoChisel doesn't help. It just converts to verilog. The verilog is then converted by a closed source program to a closed file format that is then uploaded by a closed sourced program to closed fpga hardware.