Finally, this technology is gaining acceptance. Leopard Logic and others tried this about 15 years ago but Moore's Law and Dennard Scaling were still going so

Finally, this technology is gaining acceptance. Leopard Logic and others tried this about 15 years ago but Moore's Law and Dennard Scaling were still going so CPU+FPGA didn't take hold. I'm not sure exactly how Intel is going to implement this but the predecessors had multiple configuration planes so that the FPGA could be switched from Config1 to Config2 in nanoseconds (e.g. TCP offload, then neural network calculation, then TCP offload, etc) and had some automatic compiler support.