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I've been thinking about a hypothetical CPU that has explicit cache and RAM access. It's pretty close to OP's alternative universe. What would happen is people
by ingenter 11y ago
I've been thinking about a hypothetical CPU that has explicit cache and RAM access. It's pretty close to OP's alternative universe.
What would happen is people would write wrappers for such a system so that you could think about your RAM in a linear way. And you're now doing what a Haswell CPU does.
Of course, this approach has advantages for specific tasks Let's say, we want to implement constant-timing crypto primitive and put all of the required data in cache. We can now do it.
This would also help with implementing an efficient VM, OS primitives, or many other interesting things. But it would not change the way people write C/Rust/JS/Python.
Of course, it's a useful model for your performance, and you can now think about cache misses as "internet download", and synchronization primitives as "LAN share", etc, etc.
And, of course:
http://blog.memsql.com/cache-is-the-new-ram/ http://blog.memsql.com/cache-is-the-new-ram/
- wmf 11y agoIt's not hypothetical; it's Cell. IMO it was a nightmare, but you can probably find an old PS3 with Linux and try it out.
- nickpsecurity 11y agoLook up scratchpad memory. It has better performance, lower cost, more predictable, and can help with covert channels. The thing is that most programmers didn't want to manage memory. Compiler vendors also didn't want to manage many different scratchpads. Cache was useful and productive. So, we all have caches outside a few products here and there.
- jwr 11y agoDSP (digital signal processors) let you manage cache yourself. And believe me, it isn't fun — it's something you'd want to do only for algorithms that merit tedious hand-tuning. As for linear, I believe the last high-performance CPU with a direct-mapped cache (e.g. not an X-way set associative one) was the DEC Alpha?