4 ms·

Good design does help a lot, but communication still isn't free. Commercial microkernels are usually sold on low, predictable latency ("real time"), not on raw

Good design does help a lot, but communication still isn't free. Commercial microkernels are usually sold on low, predictable latency ("real time"), not on raw throughput. Do you happen to have any relevant references on modern anti-exploit technology like ASLR (which creates tons of MMU entries to describe the fragmented address space) and microkernels (which tend to rely on fast context switching)? I can imagine a few partial solutions, but... And no, "switch to OCaml" doesn't solve the problem. ;-)

nickpsecurity 11y ago
ASLR is a tactic that was likely to be bypassed. High security doesnt rely on that. Microkernels are just a foundation to build on: components and interactions must be done right. Far as modern tech, Ill try to get you a few when Im back on my PC at home. I have tons of them actually so I need to look again to apply the mental filter. Two interesting ones for you to Google for now are SVA-OS by Criswell and Code Pointer Integrity. Certain aspects of those have minimal overhead with strong prevention. Best solutions are CPU mods that give better protections with lower costs. Especially memory safety. Architecture is main problem. All this other stuff is how we BAND-AID it. ;)
- JoachimSchipper 11y ago
  You're not wrong about band-aids, but some of us have to ship. ;-)
  - nickpsecurity 11y ago
    re shipping Oh, no you didn't! You saying Green Hills ain't been shipping? Secure64? Infineon? Better security != not shipping. Although, if I read that as a confession, then it might make a bit more sense. :P re security mitigations Ok. Thirty plus minutes into collection shows, aside from no organization, that I need to narrow this down. Most of great stuff is CPU modifications or compiler transformations that make safety/security easy. The HW has relatively low overhead in varying degrees of features supported while the SW approaches have significant overhead but support monoliths like Unikernels (or say Dom0). There are VM-style papers in my collection with clever, low-overhead stuff but bound to be breached like other clever stuff was. Nizza Security Architecture & MILS kernels are still best of that breed. So, need to know if you're interested in the HW mods and/or stronger SW safety tricks. Honestly, they're most likely to pay off. Worst case: throw extra HW at either to cover performance hit. Will get cheaper in volume. Plus, a few are simple enough to apply to your domain if they do custom CPU's for RedFox, etc. Want me to send a few?
    - JoachimSchipper 11y ago
      Thanks for the offer. I need a little time; expect an email within 18 hours.
- drudru11 11y ago
  Completely agree. It would be nice if we could get some much better architectures in more common hardware. This stuff just isn't top of mind on anything in the SOC world (raspberry pi).

nickpsecurity 11y ago

ASLR is a tactic that was likely to be bypassed. High security doesnt rely on that. Microkernels are just a foundation to build on: components and interactions must be done right. Far as modern tech, Ill try to get you a few when Im back on my PC at home. I have tons of them actually so I need to look again to apply the mental filter. Two interesting ones for you to Google for now are SVA-OS by Criswell and Code Pointer Integrity. Certain aspects of those have minimal overhead with strong prevention. Best solutions are CPU mods that give better protections with lower costs. Especially memory safety. Architecture is main problem. All this other stuff is how we BAND-AID it. ;)

JoachimSchipper 11y ago
You're not wrong about band-aids, but some of us have to ship. ;-)
- nickpsecurity 11y ago
  re shipping Oh, no you didn't! You saying Green Hills ain't been shipping? Secure64? Infineon? Better security != not shipping. Although, if I read that as a confession, then it might make a bit more sense. :P re security mitigations Ok. Thirty plus minutes into collection shows, aside from no organization, that I need to narrow this down. Most of great stuff is CPU modifications or compiler transformations that make safety/security easy. The HW has relatively low overhead in varying degrees of features supported while the SW approaches have significant overhead but support monoliths like Unikernels (or say Dom0). There are VM-style papers in my collection with clever, low-overhead stuff but bound to be breached like other clever stuff was. Nizza Security Architecture & MILS kernels are still best of that breed. So, need to know if you're interested in the HW mods and/or stronger SW safety tricks. Honestly, they're most likely to pay off. Worst case: throw extra HW at either to cover performance hit. Will get cheaper in volume. Plus, a few are simple enough to apply to your domain if they do custom CPU's for RedFox, etc. Want me to send a few?
  - JoachimSchipper 11y ago
    Thanks for the offer. I need a little time; expect an email within 18 hours.
drudru11 11y ago
Completely agree. It would be nice if we could get some much better architectures in more common hardware. This stuff just isn't top of mind on anything in the SOC world (raspberry pi).