Has the FPGA base system been built yet? I seem to sense it is only simulation at the end of the talk. I love to see the latency, through put info on the fabr

Has the FPGA base system been built yet? I seem to sense it is only simulation at the end of the talk. I love to see the latency, through put info on the fabric interface. I used to work on some AMP/SMP x86 xeon base server 15 years ago and dreamed about big massive parallel system interconnect with infinit band and/or PCIe/PCI fabric. But SW for interconnect almost infinite number of CPU via standard network HW/protocol are just so much easier.