Amazing job with the ASCII gate layout :-) Here's a link to the real layout: https://lh3.googleusercontent.com/-vsyhirk5hFU/VrgVJMXZDyI/AAAAAAAAy6g/Ydvjg1r59PY/

Amazing job with the ASCII gate layout :-) Here's a link to the real layout: https://lh3.googleusercontent.com/-vsyhirk5hFU/VrgVJMXZDyI/AAAAAAAAy6g/Ydvjg1r59PY/s800-Ic42/z80-gate-labeled.png https://lh3.googleusercontent.com/-vsyhirk5hFU/VrgVJMXZDyI/A... Note how insanely optimized the hand layout of the Z-80 is. The ARM1 has some compound gates. but I haven't come across anything more complex than OR-NAND. It's mostly built from standard cells. The layout is kind of awful compared to the 6502 or Z-80, but the ARM designers were going for ease of design rather than optimization. Since the ARM1 had so few transistors for its time, they didn't need to worry about space on the die and were more concerned with making the design easy to debug. One of the other guys looking at the ARM1 found "wires to nowhere" from fixes to the chip: http://daveshacks.blogspot.com/2016/01/inside-armv1-read-bus-b-alu-output-bus.html http://daveshacks.blogspot.com/2016/01/inside-armv1-read-bus...