3 ms·

Before answering...what do you see as the problem today and what is your goal?

nickpsecurity 11y ago
A few problems I'm trying to knock out in one solution. That's always risk but FPGA's are versatile. Here's a few: 1. Subversion and security concerns of all the black boxes in hardware alleviated with open I.P., tooling, and HW. Main concern in my field. 2. Both ASIC and FPGA entry cost to startups trying to get custom stuff out the door. Need to lower it. 3. Hobbyists and academics experimenting currently benefit from FPGA's with some HW and SW ecosystems built around them. I see that expanding with easy-to-use, open tooling. Plus maybe decent HLS system. Synflow is one I know in that niche. 4. I've been pushing potential of FPGA as accelerators for cloud, networked, and HPC applications for a while. There's an uptake in their use but cloud is cost-sensitive. FPGA's w/ OpenCL-style tooling sold at cost in boards pluggable into regular servers or desktops could... well, you know the potential because you're in that market & brave enough to compete on architecture. ;) Pico Computing also comes to mind with their FPGA desktops. 5. Maybe make HW prototyping, verification, etc cheaper as another source of revenue as I've seen some ASIC-oriented products that use FPGA's for this. I know many of the tools are too slow, too, so there's potential for straight acceleration as in 4. 6. Reduce cost (and runtime risk) of FPGA-proven components with S-ASIC conversion. Also thought about anti-fuse but think S-ASIC is legally & physically safer. Not a HW expert, though, so going on second-hand comments there. So, there's at least 5 potential benefits from an open-source FPGA sold at cost. Especially on performance if people start cramming them into boards like Pico and Maxeler do with cloud company orders. Good on trustworthy, hobbyist, and prototyping ends with low cost & open, expanding SW side. So, that's the idea. Pretty ambitious and with high failure potential for sure. It's why, if I attempt it, I'll be enlisting cloud companies and academics. AMD's "semi-custom" business seems to indicate some potential if it's integrated into a CPU's memory bus or a CPU itself. Core logic and stuff only needs to be done once on one good node. Subsequent integrations much cheaper.
- adapteva 11y ago
  You can get lattice FPGAs for a few dollars each from distributors. Zynq's in volume are reportedly as $15/each. Tools are free. If cost is the main concern, then how low do you need to go? An open FPGA arhitecture is a good thing, but it will require something akin to the RISC-V effort to make it happen. (ie major DARPA/NSF, academic, industry backing to bootstrap). Let's see what happens...
  - nickpsecurity 11y ago
    Subversion and amount of logic are main concerns. Lattice aint Virtex6 last I checked. I agree on RISC-V/DARPA comparison though.
  - chei0aiV 11y ago
    No, just a student doing a masters thesis can create an open FPGA: https://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43.html https://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-4...
    - nickpsecurity 11y ago
      I linked to that above. The conversation moved on because, as your paper noted, what they created lacks a lot of the functionality and even core elements of commercial FPGA's. I agree academics can do most or all of it but it will take more than one at Master's level to be competitive.

A few problems I'm trying to knock out in one solution. That's always risk but FPGA's are versatile. Here's a few: 1. Subversion and security concerns of all the black boxes in hardware alleviated with open I.P., tooling, and HW. Main concern in my field. 2. Both ASIC and FPGA entry cost to startups trying to get custom stuff out the door. Need to lower it. 3. Hobbyists and academics experimenting currently benefit from FPGA's with some HW and SW ecosystems built around them. I see that expanding with easy-to-use, open tooling. Plus maybe decent HLS system. Synflow is one I know in that niche. 4. I've been pushing potential of FPGA as accelerators for cloud, networked, and HPC applications for a while. There's an uptake in their use but cloud is cost-sensitive. FPGA's w/ OpenCL-style tooling sold at cost in boards pluggable into regular servers or desktops could... well, you know the potential because you're in that market & brave enough to compete on architecture. ;) Pico Computing also comes to mind with their FPGA desktops. 5. Maybe make HW prototyping, verification, etc cheaper as another source of revenue as I've seen some ASIC-oriented products that use FPGA's for this. I know many of the tools are too slow, too, so there's potential for straight acceleration as in 4. 6. Reduce cost (and runtime risk) of FPGA-proven components with S-ASIC conversion. Also thought about anti-fuse but think S-ASIC is legally & physically safer. Not a HW expert, though, so going on second-hand comments there. So, there's at least 5 potential benefits from an open-source FPGA sold at cost. Especially on performance if people start cramming them into boards like Pico and Maxeler do with cloud company orders. Good on trustworthy, hobbyist, and prototyping ends with low cost & open, expanding SW side. So, that's the idea. Pretty ambitious and with high failure potential for sure. It's why, if I attempt it, I'll be enlisting cloud companies and academics. AMD's "semi-custom" business seems to indicate some potential if it's integrated into a CPU's memory bus or a CPU itself. Core logic and stuff only needs to be done once on one good node. Subsequent integrations much cheaper.

adapteva 11y ago
You can get lattice FPGAs for a few dollars each from distributors. Zynq's in volume are reportedly as $15/each. Tools are free. If cost is the main concern, then how low do you need to go? An open FPGA arhitecture is a good thing, but it will require something akin to the RISC-V effort to make it happen. (ie major DARPA/NSF, academic, industry backing to bootstrap). Let's see what happens...
- nickpsecurity 11y ago
  Subversion and amount of logic are main concerns. Lattice aint Virtex6 last I checked. I agree on RISC-V/DARPA comparison though.
- chei0aiV 11y ago
  No, just a student doing a masters thesis can create an open FPGA: https://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43.html https://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-4...
  - nickpsecurity 11y ago
    I linked to that above. The conversation moved on because, as your paper noted, what they created lacks a lot of the functionality and even core elements of commercial FPGA's. I agree academics can do most or all of it but it will take more than one at Master's level to be competitive.