4 ms·
Can RISC-V be implemented in the on-board Xilinx Zynq 7020 FPGA of the A101040 (Epiphany III) Parallella?
by browser-bob 11y ago
Can RISC-V be implemented in the on-board Xilinx Zynq 7020 FPGA of the A101040 (Epiphany III) Parallella?
- adapteva 11y agoDefinitely! Straightforward, especially if you use https://github.com/parallella/oh https://github.com/parallella/oh
- browser-bob 11y agoOh! Sweet!
- zhemao 11y agoYes, definitely. Berkeley's open-source Rocket[1] core can already be programmed onto the Zedboard and ZC706[2], which also use Zynq 7000 series FPGAs. Getting it to work on the Parallela should just be a matter of changing the clock constraints and pin settings and finding a configuration that will fit on the FPGA. [1] https://github.com/ucb-bar/rocket-chip https://github.com/ucb-bar/rocket-chip [2] https://github.com/ucb-bar/fpga-zynq https://github.com/ucb-bar/fpga-zynq
- cmrx64 11y agonot to mention the smaller implementations like picorv32 and zscale/vscale.
- browser-bob 11y agoNeat-o! Thanks :)
- gluggymug 11y agoWhy do you want to do that? Isn't there a hard ARM core on the Zynq 7000s ?