3 ms·
By propagating the carries in the ALU? (oh! intel announced they are going to ship this feature) By using indirect addressing? (like PAE) Since they are physi
by SFjulie1 11y ago
By propagating the carries in the ALU? (oh! intel announced they are going to ship this feature)
By using indirect addressing? (like PAE)
Since they are physical boundary to this world and since linear addressing is constricted by speed of light vs the frequency of computers, there is a definite optimum we will not be able to break easily through for the next decades.
Every time we extend the memory address space, we add levels of indirections on the Silicium anyway.
C0 (the velocity of light in the void) is our first limit. Available resources/power on earth is our second limit.
And money available to the consumers is the last one.
Do we really have any good reasons to adopt new technologies that do not prove to be more efficient and/or less costly?
- tremon 11y agoYou are correct, that the hardware can do so without too much overhead. But I was arguing from the software point of view: segmented memory means no simple pointer arithmetic above the 32-bit limit. That means that software managing datasets above 4GB will always need special-casing, or be written with indirect allocation in all cases. I don't see a good reason for mandating that kind of complexity in code. If you have a solution for allowing 64bit linear addressing in code, I'm all for it.