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We're aiming to begin disclosing architecture and software details in March, with talks at 3 or 4 major industry conferences between then and August. As I said,
by trsohmers 11y ago
We're aiming to begin disclosing architecture and software details in March, with talks at 3 or 4 major industry conferences between then and August. As I said, we have our 28nm shuttle run booked for May, so baring any major issues, we're aiming for a August/September public demonstration of our first chips.
We have already been evaluating architectural models and FPGA demonstrations with partners for the past couple of months, but we feel its better to wait for real silicon to publicly show benchmarks, but so far so good.
- nickpsecurity 11y agoMakes sense. I look forward to that. Curious, could you post what a 28nm run cost you for what percentage? Might be enlightening to people wondering about the real-world cost of such things outside of confusing $/mm2, etc on many sites.
- trsohmers 11y agoWe're all taking 2 weeks off after tapeout, so depending on how much I'll want to work during those 2 weeks, I'm thinking about writing a very long (or series of) blog posts going over the entire process (From moving out to the bay area, going a bit crazy and deciding I wanted to get into semiconductors, to now taping out a chip). The thing I would have loved the most while working on this the past 2 and a half years would have been some first hand account that would have saved me a lot of time at the beginning. Plus you are totally right that there is not much information out there that breaks it down to the rest of tech industry folk.
- nickpsecurity 11y agoThat's awesome. See, it's stuff like this that's why you're among my favorite chip designers despite being new to the game. ;) Look forward to the write-up.