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> "Good explanations." Thanks. > "What's more interesting is the Amiga model of CPU + accelerators is becoming the new default in high-performance application
by ZenoArrow 11y ago
> "Good explanations."
Thanks.
> "What's more interesting is the Amiga model of CPU + accelerators is becoming the new default in high-performance applications. There could be a revival of OS's natively supporting accelerators of a niche market that cares about that sort of thing."
It's possible, though I'd like to see an OS designed from the ground up to support this type of heterogeneous architecture. A few years back I wrote a few notes about how to make better use of reconfigurable computing (on an Amiga forum, funnily enough), still think the basic ideas are sound, though there are plenty of details left to work out:
http://www.amiga.org/forums/showpost.php?p=679874&postcount=98 http://www.amiga.org/forums/showpost.php?p=679874&postcount=...
> "The Octeon II's often go for around $200 on eBay. They have 16 cores, multi-Gbps network acceleration, onboard crypto, Linux support, and use little power. That's the kind of shit that has potential. Maybe that plus a good FPGA for high-end model where main SOC is multiplexed like usual but one app at a time gets FPGA and/or GPU. A bunch of simple cores, the right on-board accelerators, and FPGA could combine in performance-critical apps to blow Xeons out the water despite being on older process nodes."
The Octeon III sounds like quite a high end device, I'm sure it'd be a beast with regards to performance, but do you know of anything similar at a lower price point? Does $200 get you an Octeon II evaluation board on eBay?
- nickpsecurity 11y agoThe Amiga post is interesting but too much on memrister. I avoid speculative stuff. For FPGA's, what's proven so far is integration into embedded/HPC and automated partitioning of apps to FPGA's. So your idea of an OS clean slated for that with Kay style DSL's is possible, maybe even with current hardware. Also, their LISP work could turn to hardware easily with SHard Scheme-to-hardware compiler or an improvement to it. Re octeon Yeah, it's high-end but that's due to its market & low volume. Probably custom, too. I got the price by various boards that show up on eBay with Octeon II's priced from $150-300. Example: http://m.ebay.com/itm/Interface-Masters-Quad-1GbE-PCIe-Ethernet-Network-Bypass-Adapter-Niagara-804-BP-/301802719638?nav=SEARCH http://m.ebay.com/itm/Interface-Masters-Quad-1GbE-PCIe-Ether... Far as cost, a standard cell design with a few accelerators should be straight-forward. I also just got half a dozen papers on transistor-level optimization techniques that are automated and get a bit closer to custom performance. So potential there.