So, it seems like the renderer is doing a lot of small updates to buffers, causing pipeline stalls. The article does not mention the size, offset and alignment

So, it seems like the renderer is doing a lot of small updates to buffers, causing pipeline stalls. The article does not mention the size, offset and alignment used to update uniform buffers, which may play a huge factor here. The details of CPU-GPU buffer coherency are hardware specific, but using a larger alignment can help hitting the fast path. At worst, this ends up being a read-modify-write operation to the VRAM over a DMA transfer. The alignment of individual writes should be at least 256 bytes, prefarably even more. A multiple of a CPU (or GPU) page size may help: 4k, 64k, 2M are good alignments. In modern OpenGL (w/GL_ARB_buffer_storage)/D3D/Vulkan, you could use a persistent/coherent mapped buffer and explicit sync points. It makes this problem go away, but requires a bit more programming effort to set up correctly.