3 ms·
Are you sure you measured correctly without systematic errors caused by out of order execution? Did you serialize execution by using RDTSCP or CPUID? Any chance
by vardump 11y ago
Are you sure you measured correctly without systematic errors caused by out of order execution? Did you serialize execution by using RDTSCP or CPUID? Any chance you accidentally compared TSC counts between two separate sockets? Did you keep in mind that each CPU socket has a different unsynchronized TSC.
Not accounting for those could give you an illusion of asymmetry.
- Moral_ 11y agoYeah, when we got results we didn't expect we made sure that the experiment was setup correctly, and actually made sense. We use the timing instructions illustrated in this intel white paper, which does do serialization http://www.intel.com/content/www/us/en/embedded/training/ia-32-ia-64-benchmark-code-execution-paper.html http://www.intel.com/content/www/us/en/embedded/training/ia-.... More over we tried a few different programs, CCbench, custom home-brewed, and BenchIT, all giving the same results. There's a paper about Asymmetry: Thread and Memory Placement on NUMA Systems: Asymmetry Matters https://www.usenix.org/system/files/conference/atc15/atc15-paper-lepers.pdf https://www.usenix.org/system/files/conference/atc15/atc15-p...