5 ms·
I only skimmed the thing a bit, but how do they deal with heat exactly? Water cooling at every level?
by Frenchgeek 11y ago
I only skimmed the thing a bit, but how do they deal with heat exactly? Water cooling at every level?
- Cthulhu_ 11y agoIt also kinda depends on the heat generated; I can imagine that this system allows for lower power consumption, which is equivalent to lower heat production.
- jacquesm 11y agoFTFA: "Just as skyscrapers have ventilation systems, N3XT high-rise chip designs incorporate thermal cooling layers. This work, led by Stanford mechanical engineers Kenneth Goodson and Mehdi Asheghi, ensures that the heat rising from the stacked layers of electronics does not degrade overall system performance." Paper about that: https://www.researchgate.net/publication/263004944_Phonon_scattering_in_strained_transition_layers_for_GaN_heteroepitaxy https://www.researchgate.net/publication/263004944_Phonon_sc...
- mhb 11y agoSince these are stacked solid layers, heat isn't really "rising" though, is it?
- jlebrech 11y agomaybe that's what the orange layer is which I assume is copper
- noobiemcfoob 11y agoI was in a 3DIC research group for ~2 years. We were mainly trying to build heat models for stacked chip designs to investigate this issue. Another group that was looking at architecture was primarily relying on placing low power density devices on the lower levels of the chip (with worse heat dissipation) and the high-power devices at the top (with better heat dissipation), though I never saw the results of their finished design. Ultimately though, heat is the primary issue with 3DIC. Assuaging the memory bottleneck by drastically increasing bandwidth at the cost of significantly more heat.