2 ms·
Is it actually? You loose almost all the conditional execution, lots of the interesting shifted addressing (I think Aarch64 allows shifts up to 3 only). You get
by ant6n 11y ago
Is it actually? You loose almost all the conditional execution, lots of the interesting shifted addressing (I think Aarch64 allows shifts up to 3 only). You get more registers. Oh and no 16-bit instruction mode anymore.