3 ms·
Keep in mind that the levels of caches increase the latency of a cache miss. So basically you want enough cache for the cachable bits and as little cache as po
by sliken 11y ago
Keep in mind that the levels of caches increase the latency of a cache miss. So basically you want enough cache for the cachable bits and as little cache as possible for the non cachable bits.
So higher bandwidth and many uses cases that involve streaming (like say 4k video or writing triangles from the GPU to the frame buffer) it makes sense to get rid of the L3 and upgrade the bandwidth to 50GB/sec.
Hopefully Intel will match the bandwidth with their next generation. So far Intel's taken the easy route and added an off chip, but inside package cache for their highest end GPUs (Iris Pro) but left the memory bandwidth the same (128 bit @ DDR4 speeds around 25GB/sec.)