We really need a fully free FPGA toolchain. I am particularly interested in liberating the Xilinx CSG324 chip that was chosen for the Novena. I have heard tha

We really need a fully free FPGA toolchain. I am particularly interested in liberating the Xilinx CSG324 chip that was chosen for the Novena. I have heard that it is possible to fry the chip with a bad bitstream, so this baby step[0] is all I've managed to accomplish. The fpgatools project is messy, but the only project I know of that has figured out the bitstream format for a closely related Xilinx FPGA model. I even wrote some Scheme code that could produce the exact same bitstream as the example fpgatools program using a little domain-specific language... if only it could run on my FPGA. Others note that the bitstream format is only a small piece of the puzzle, and while I agree, I don't yet care about the HDLs and all of the tools built on top. Just figuring out the bitstream format for more FPGAs would be a huge win and would enable a free toolchain to be begin to be written. [0] https://github.com/davexunit/fpgatools/commit/06e95c379cefd9c8e21dad44747109e9095cc5b5 https://github.com/davexunit/fpgatools/commit/06e95c379cefd9...