3 ms·
Definitely, if you just want implement one in a HDL. For instance the RISC-V ISA has been implemented multiple times in various languages [for instance: https:/
by Gladdyu 11y ago
Definitely, if you just want implement one in a HDL. For instance the RISC-V ISA has been implemented multiple times in various languages [for instance: https://github.com/ucb-bar/riscv-sodor https://github.com/ucb-bar/riscv-sodor]. RISC-V is quite a bit more complex than the 4004 ISA.
If you want to DIY the entire chip, as in manually lay out the transistors, I suppose it can be done if you have quite a bit of experience in electrical engineering, but it'd be rather cumbersome given the 'modern' (as far as HDL tooling is modern) tooling that is already available.
- avmich 11y agoThank you, but the idea was to actually recreate the die itself. That's where one can use all those available masks. FPGA path is nice, but masks are useless - and instead a HDL is needed, with the whole 'nother toolchain.
- FullyFunctional 11y ago"Fabbing" your own ICs is very hard. I know only of a single DIY effort which succeed and it takes much equipment and knowledge. Personally, I'd be happy to make just a couple of transistors (see also: https://news.ycombinator.com/item?id=10558206 https://news.ycombinator.com/item?id=10558206)