3 ms·
I'd definitely be interested in checking that out if you have a link
by hamiltonkibbe 11y ago
I'd definitely be interested in checking that out if you have a link
- sklogic 11y agoI have not published the language yet, have to produce some nice looking examples first. But you can take a look at my approach to extensibility in general (the HDL language is using exactly the same thing) and some of the earlier mixing Verilog with C experiments here: https://github.com/combinatorylogic https://github.com/combinatorylogic