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Fairly big. I am part of the Cryptech core team and has designed most of the crypto cores and the TRNG. I have worked on several FPGA designs including VoIP gat

Fairly big. I am part of the Cryptech core team and has designed most of the crypto cores and the TRNG. I have worked on several FPGA designs including VoIP gateways, transcoders, radar systems, networking etc. focus on use case arch more than low level interface issues. Done some ASICs to.

nickpsecurity 11y ago
Sweet. That means you have the experience for this. I'm ignoring the ones that seem like OSS/academic toys or commercial that are focused on too narrow a model. The two candidates I stumbled upon recently are Synflow's Cx language and Synthagate HLS. Synflow [1] is interesting because it's a step up from Verilog/VHDL w/ open-source tooling. Their strategy sounds smarter and easier than many where it seems to try to augment the human brain rather than replace it. That it outputs synthesizable Verilog/VHDL is nice. Downside is that one of the founders wrote an article [2] expressing that HLS is dead and they transitioned to an internet-of-things company instead. Upside is they probably keep supporting this, anything OSS can be picked up by another team, and he was on HN very happy to answer any questions. I just lack hands-on experience to properly put Cflow through paces and ask him the right questions, you know. What got me interested, other than Cflow's design, was that they were offering I.P. blocks for around $500. I never see I.P. for three digits. So, I'm hoping it's because they're onto something good. :) The other to check out is Synthagate. Syntagate's web site [3] details their methodology using Abstract State Machines with two different types for control and data. That's interesting and it's probably expensive. More interesting was Baranov's book [4] that details his exact methodology for doing HLS. Correct me if I'm wrong, but full details of a HLS process good enough to synthesize microcontrollers rarely leaves trade secret stage. The real value here, other than possibly good HLS tool, is a specific method of doing HLS described in enough detail to clone with OSS tools. Just need someone with HW design expertise, esp FPGA's, to evaluate what's in the book to tell me if it could be used for algorithms, protocol engines, etc. Does Baranov's method look like it can work for real-world use cases and does his tool do the job for a set of I.P. representative of what people will really use? The former you can just read but the latter might be available with free trial or something. I'm thinking it is his secret sauce because he (a) sells it and (b) seems to have pulled it off his web site. Goofball forgot about Wayback Machine. Enjoy. :) [1] http://cx-lang.org/ http://cx-lang.org/ [2] http://www10.edacafe.com/blogs/disruptedhard/2015/04/13/numbers-dont-lie-there-is-virtually-no-interest-in-high-level-synthesis/ http://www10.edacafe.com/blogs/disruptedhard/2015/04/13/numb... [3] http://synthezza.com/what-makes-synthagate-different1/ http://synthezza.com/what-makes-synthagate-different1/ [4] https://web.archive.org/web/20150314182353/http://synthezza.com/download/AboutUs/Book2011.zip https://web.archive.org/web/20150314182353/http://synthezza....

nickpsecurity 11y ago

Sweet. That means you have the experience for this. I'm ignoring the ones that seem like OSS/academic toys or commercial that are focused on too narrow a model. The two candidates I stumbled upon recently are Synflow's Cx language and Synthagate HLS. Synflow [1] is interesting because it's a step up from Verilog/VHDL w/ open-source tooling. Their strategy sounds smarter and easier than many where it seems to try to augment the human brain rather than replace it. That it outputs synthesizable Verilog/VHDL is nice. Downside is that one of the founders wrote an article [2] expressing that HLS is dead and they transitioned to an internet-of-things company instead. Upside is they probably keep supporting this, anything OSS can be picked up by another team, and he was on HN very happy to answer any questions. I just lack hands-on experience to properly put Cflow through paces and ask him the right questions, you know. What got me interested, other than Cflow's design, was that they were offering I.P. blocks for around $500. I never see I.P. for three digits. So, I'm hoping it's because they're onto something good. :) The other to check out is Synthagate. Syntagate's web site [3] details their methodology using Abstract State Machines with two different types for control and data. That's interesting and it's probably expensive. More interesting was Baranov's book [4] that details his exact methodology for doing HLS. Correct me if I'm wrong, but full details of a HLS process good enough to synthesize microcontrollers rarely leaves trade secret stage. The real value here, other than possibly good HLS tool, is a specific method of doing HLS described in enough detail to clone with OSS tools. Just need someone with HW design expertise, esp FPGA's, to evaluate what's in the book to tell me if it could be used for algorithms, protocol engines, etc. Does Baranov's method look like it can work for real-world use cases and does his tool do the job for a set of I.P. representative of what people will really use? The former you can just read but the latter might be available with free trial or something. I'm thinking it is his secret sauce because he (a) sells it and (b) seems to have pulled it off his web site. Goofball forgot about Wayback Machine. Enjoy. :) [1] http://cx-lang.org/ http://cx-lang.org/ [2] http://www10.edacafe.com/blogs/disruptedhard/2015/04/13/numbers-dont-lie-there-is-virtually-no-interest-in-high-level-synthesis/ http://www10.edacafe.com/blogs/disruptedhard/2015/04/13/numb... [3] http://synthezza.com/what-makes-synthagate-different1/ http://synthezza.com/what-makes-synthagate-different1/ [4] https://web.archive.org/web/20150314182353/http://synthezza.com/download/AboutUs/Book2011.zip https://web.archive.org/web/20150314182353/http://synthezza....