Would love to share more info, but I should have stated that it won't magically make Cell simple to program for... our new compiler techniques are dependent on

Would love to share more info, but I should have stated that it won't magically make Cell simple to program for... our new compiler techniques are dependent on a lot of new architectural ideas we have implemented in hardware, and while we would solve the memory cramming problem (Trying to fit your application into the fixed scratchpad space) on many architectures (Cell, TI DSPs, a lot of other embedded chips), the real magic we have developed is in being able to have 90%+ of it statically scheduled, which we're only able to do with our architecture. If you're interested, check out our website (http://rexcomputing.com http://rexcomputing.com) and sign up for the mailing list... The only thing we have public is a very vague and more technique overview paper in general rather than a real description of what we are doing(http://memsys.io/wp-content/uploads/2015/09/p98-sebexen.pdf http://memsys.io/wp-content/uploads/2015/09/p98-sebexen.pdf). It presented at a conference earlier this month (and to be published by the ACM), but I hope to give more details on our specific implementation and other cool features later this year. If you're willing to sign a NDA, feel free to use the contact us on the website though.