That's not the format used by the x86 BCD instructions. x86 (and the 8080 before it) use 4-bit packed BCD so each byte contains two digits (x86 also has instruc

That's not the format used by the x86 BCD instructions. x86 (and the 8080 before it) use 4-bit packed BCD so each byte contains two digits (x86 also has instructions for dealing with unpacked BCD, but the digits are still 4-bit). Additionally, the 8086 was a 16-bit processor (the 8088 had an 8-bit bus, but that came later and was still 16-bit internally) so I don't think the 8-bit limitation is due to the word size of the CPU in this case. It could be a holdover from the 8080 (8086 isn't binary compatible, but it was marketed as "source" compatible so there's a fair amount of similarity), but the 68000 (16-bit implementation of a 32-bit ISA) has the same limitation. I think it probably comes down to cost. Just to support two packed digits, you need a fair bit of extra hardware (or a little extra hardware and a bunch of microcode) so you can properly calculate the correction factor. Expanding this to a full word means you need to be able to do that calculation for 4 nibbles instead of 2 which is about 3 times worse (you effectively get the most significant nibble "for free" so it's 3 extra nibbles to support instead of just 1).