If I understand correctly they combine a standard X86 processor with two FPGAs. One FPGA runs a custom CPU called MAP and the other manages the communication be

If I understand correctly they combine a standard X86 processor with two FPGAs. One FPGA runs a custom CPU called MAP and the other manages the communication between the two CPUs, memory and other boards/peripherals. The develoment system accepts standard C/C++ code and emits two programs: one for the X86 processor, one for the MAP processor and a hardware description to adapt the MAP processor to the specific requirements of the source program. For some programs this can be a big win (and for others not so much).