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I have little experience with hardware but I've often wondered about this. Chip manufacturers seem to be trying to fit more and more into an amount of space tha

I have little experience with hardware but I've often wondered about this. Chip manufacturers seem to be trying to fit more and more into an amount of space that continues to shrink. Why not stay at, say, 1x1" and fill that space out? I'm sure there's a good reason why not, heat or density of the connections or somesuch. I'd love a more thorough explanation however, if anyone knows.

yk 11y ago
Because they want to fit as many dies as possible onto a wafer. The cost for lithography is largely per waver, so if they can cut more chips from a single waver, that is, if their chips are smaller, they can increase their profit per wafer.
- mpweiher 11y ago
  That and smaller geometries tend(ed) to get faster (the electrons have to travel smaller distances) and consume less power to boost. Win win win. This is why Intel used to beat out much better processor architectures simply by having enough money to always be at least 1 fab generation ahead.
  - irl_zebra 11y ago
    Forgive my ignorance, but if the fab generation ahead was already invented, and (my understanding is) a new fab process requires completely new machinery, what stopped AMDAMD, whoever, from "skipping" a generation to catch up with Intel?
    - makomk 11y ago
      As I understand it, every fab generation requires a bunch of changes and new tricks, but they're generally in different areas of the process - and you need most or all of the tricks learnt in creating the previous generation of fab in order to build the one after that. So you probably don't save all that much time or money by skipping a generation, and in the meantime you're a generation further behind and have nothing competitive to sell.
pkaye 11y ago
Die size influences yield which immensely impacts how much money you make. So you make things as small as feasible. Smaller die means more chips per wafer and smaller die means less chance of some contamination causing a particular die to be defective.
akiselev 11y ago
The smaller your transistors get, the more errors you get per square inch of silicon wafer so in order to make ends meet as the manufacturing gets more and more expensive, you have to do a lot of tricks. Tiny errors that are within a single processor can usually be fixed by disabling some cores or features and downgrading the SKU (i7 sold as i5). However, big errors are extremely costly and a few can wipe out the yield and profitability on a wafer. If you have, for example, two 1x1 in processors on a wafer and a scratch stretching two adjacent corners of those processors, you lose both processors. If the scratch is diagonal and at the boundary between three or four processors, you would lose them all. If, however, those 1x1in units are split into .5x.5in ones, even your worst errors are unlikely to destroy the entire 2 sq in surface. The difference in size isn't as drastic as in my example, but there are many other factors that impact yield and chip size is one of the most impactful ones (everything else being equal)
sliverstorm 11y ago
Defect density is relatively fixed. If you have very large die, defects will take out all your chips on the wafer and leave you with zero yield. If you have very small die, you will only lose as many die as you have defects.

yk 11y ago

Because they want to fit as many dies as possible onto a wafer. The cost for lithography is largely per waver, so if they can cut more chips from a single waver, that is, if their chips are smaller, they can increase their profit per wafer.

mpweiher 11y ago
That and smaller geometries tend(ed) to get faster (the electrons have to travel smaller distances) and consume less power to boost. Win win win. This is why Intel used to beat out much better processor architectures simply by having enough money to always be at least 1 fab generation ahead.
- irl_zebra 11y ago
  Forgive my ignorance, but if the fab generation ahead was already invented, and (my understanding is) a new fab process requires completely new machinery, what stopped AMDAMD, whoever, from "skipping" a generation to catch up with Intel?
  - makomk 11y ago
    As I understand it, every fab generation requires a bunch of changes and new tricks, but they're generally in different areas of the process - and you need most or all of the tricks learnt in creating the previous generation of fab in order to build the one after that. So you probably don't save all that much time or money by skipping a generation, and in the meantime you're a generation further behind and have nothing competitive to sell.

pkaye 11y ago

Die size influences yield which immensely impacts how much money you make. So you make things as small as feasible. Smaller die means more chips per wafer and smaller die means less chance of some contamination causing a particular die to be defective.

akiselev 11y ago

The smaller your transistors get, the more errors you get per square inch of silicon wafer so in order to make ends meet as the manufacturing gets more and more expensive, you have to do a lot of tricks. Tiny errors that are within a single processor can usually be fixed by disabling some cores or features and downgrading the SKU (i7 sold as i5). However, big errors are extremely costly and a few can wipe out the yield and profitability on a wafer. If you have, for example, two 1x1 in processors on a wafer and a scratch stretching two adjacent corners of those processors, you lose both processors. If the scratch is diagonal and at the boundary between three or four processors, you would lose them all. If, however, those 1x1in units are split into .5x.5in ones, even your worst errors are unlikely to destroy the entire 2 sq in surface. The difference in size isn't as drastic as in my example, but there are many other factors that impact yield and chip size is one of the most impactful ones (everything else being equal)

sliverstorm 11y ago

Defect density is relatively fixed. If you have very large die, defects will take out all your chips on the wafer and leave you with zero yield. If you have very small die, you will only lose as many die as you have defects.