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Interesting paper, thanks for linking it in here. I don't really understand their conclusions though. They show that the behaviour of x86 (converted to uOps) a
by joosters 11y ago
Interesting paper, thanks for linking it in here.
I don't really understand their conclusions though. They show that the behaviour of x86 (converted to uOps) and ARM is similar (instructions in flight, etc), but I can't see how their the end result (the i7 is vastly faster, sometimes 25x faster than the ARM A8/A9) can demonstrate that the ARM instruction set is not responsible for some of the performance difference.
The paper certainly demonstrates that there is no performance hit going the other way, i.e. the extra complexity of the x86 instruction is never a bottleneck, and once translated to uOps, the instructions are broadly comparable to RISC. I get that, but I don't get how they can also conclude that the ARM ISA is not a performance limiter. They don't investigate code size or memory/cache performance, for instance.
- userbinator 11y agoAlso, synthetically scaling an i7 down to 1GHz, assuming the performance will be proportional, is not very fair - because of how much faster its core runs compared to memory, (contrast this with the ARMs which are closer) with decreasing core speed the performance decrease will be sublinear, whereas power consumption is more like exponential in frequency: http://i.stack.imgur.com/daciI.png http://i.stack.imgur.com/daciI.png I'd expect actually running an i7 at 1GHz vs 3GHz to be far more power efficient than their scaling indicates. There's some past HN discussion about that paper/an article related to it here: https://news.ycombinator.com/item?id=8235120 https://news.ycombinator.com/item?id=8235120