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OMG I love this guy and need to have his babies immediately. Some links: http://www.vrworld.com/2015/03/24/the-evils-of-floating-point-and-the-joys-of-unum/2/
by yarvin9 11y ago
OMG I love this guy and need to have his babies immediately. Some links:
http://www.vrworld.com/2015/03/24/the-evils-of-floating-point-and-the-joys-of-unum/2/ http://www.vrworld.com/2015/03/24/the-evils-of-floating-poin...
http://sites.ieee.org/scv-cs/files/2013/03/Right-SizingPrecision1.pdf http://sites.ieee.org/scv-cs/files/2013/03/Right-SizingPreci...
- dnautics 11y agoI'm currently working on a Julia implementation of unums that supports environments {0,0} -> {6,11}. It will be public soon (next few weeks or so). I'm finished with addition, subtraction, multiplication, and division is not done (I'm working on it today), but the division algo works quite nicely. It is however, really slow (about 40x slower than bigfloat)... One interesting thing, John and I had an argument about the implementation, because there is one part about it that really sucks. Eventually he admitted that it had rankled him too and that the reason why he made this design choice was so that float64 could bitwise map smoothly onto unum{4,6} and float32 onto unum{4,5}... And that people would actually refuse to use unums if not for this direct bitwise mapping! So I capitulated.
- jacobolus 11y ago> there is one part about it that really sucks Don’t leave us hanging! What is the part that really sucks?
- dnautics 11y agoThe spec has an asymmetric exponent bias. IEEE floating points have an asymmetric exponent bias - for example float64 has 1022 bias (symmetric would be a 1023 bias). Because of the properties of unums, the universal representation of the value 1 is subnormal, and subnormals are tricky to deal with. If unums had symmetric exponent biases, then there would not be multiple representations of one.
- bsder 11y ago> One interesting thing, John and I had an argument about the implementation, because there is one part about it that really sucks. And which part would that be? I'm mostly asking out of curiosity, so don't put yourself out if the answer is too long and involved. As someone who has implemented a couple FPUs, I can assure you that there are quite a few pieces of IEEE 754 that suck to implement.