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In the end, I suspect they will have reinvented an AS/400/ibm i attached via fibre channel to a flash array... Except that was back when they were writing thei
by StillBored 11y ago
In the end, I suspect they will have reinvented an AS/400/ibm i attached via fibre channel to a flash array...
Except that was back when they were writing their own OS to run on it. By doing that, the possibility seemed to exist for all kinds of crazy ideas. Once they try to conform it to a posix like environment I suspect that a lot of possible hardware advantages will start to evaporate. Either the external ram will be maintained in a (semi)consistent (reinventing of any number of single system image clustering mechanisms) manner, or they will end up using a filesystem or MPI type layer on top of it, thereby reducing its potential advantages.
- nickpsecurity 11y agoI think something like this will have to be clean-slate. The trick used by SGI and Cray, though, was to have some nodes run a full OS with compute nodes run a tiny OS. Then, there were storage or I/O nodes to handle that stuff. Most of the parallelism was in the operation of the compute nodes, interconnect, and storage. So, this worked out pretty well in practice for many MPP-style system. Today's work is trying to make denser, more efficient MPP's. So, they could use similar techniques as what worked in the past. The use of ARM processors threw me, though. Usually problems needing this much memory and I/O take similarly beefy, multi-core, multi-CPU nodes to handle it. That wasn't good enough so many added GPU's and FPGA's to nodes. So, kind of wondering if their little ARM chips will cut it. Maybe something like Cavium's ThunderX could do...