Well, I was actually trying to say the decoders work independently and produce disjoint subsets of the instruction stream. How the calculations actually get don

Well, I was actually trying to say the decoders work independently and produce disjoint subsets of the instruction stream. How the calculations actually get done is harder, but should be largely independent of how the instructions are encoded. One great thing about the Mill is that instructions within a bundle are mostly disjoint. The Mill has no data hazards and each instruction takes from the belt, which is not changed until the bundle is finished. There are "gangs" that allow combining multiple instructions, but I don't know how they are handled. In general, this means a Mill has more instruction interdependence than an x86. Although an x86 could have a split-stream instruction cache, data dependence prevents a traditional architecture from parallelizing itself as much as the Mill and hazards prevent the kind of speculation the Mill can do. Since instruction decode isn't a big bottleneck on fixed-width architechtures, there's no real pressure to innovate there.