Yeah... gcc's optimizer very often falls down in absolutely trivial cases on ARM. Like they discovered here - compiling even u32 read32(const void* ptr) {

Yeah... gcc's optimizer very often falls down in absolutely trivial cases on ARM. Like they discovered here - compiling even u32 read32(const void* ptr) { u32 result; memcpy(&result, ptr, 4); return result; } results in a load from ptr, then a store to the stack, then a load again into the same register to return. Thats... kinda bad that it can't eliminate an easy dead store to the stack. @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. ldr r0, [r0, #0] @ unaligned sub sp, sp, #8 str r0, [sp, #4] @ unaligned ldr r0, [sp, #4] add sp, sp, #8 bx lr Though this specific case is probably ultimately because gcc had code to handle unaligned accesses via bytewise accesses (I think... can't get gcc to generate such a sequence now), since unaligned support in armv6 could be (and often was) disabled by the OS, and it still hasn't been excised from the newer architectures that don't need it. LLVM on the other hand has never cared about ARM CPUs/OSes that don't support unaligned accesses.